/* Main instruction fetch/decode loop */ while (reason == 0) { /* loop until halted */ // clean SIMH loop exit code here // SIMH clock queue code here // handle hardware device interrupt here // handle SIMH breakpoint here // perform instruction fetch here /* Instruction decoding happens below */ switch ((IR >> 7) & 037) { /* decode IR<0:4> */ /* Opcode 0, AND */ case 000: /* AND, dir, zero */ // Handle AND, direct, zero page break case 001: /* AND, dir, curr */ // Handle AND, direct, current page break; case 002: /* AND, indir, zero */ // Handle AND, indirect, zero page break; case 003: /* AND, indir, curr */ // Handle AND, indirect, current page break; /* Opcode 1, TAD */ // same structure as AND: direct / indirect with zero / current page break; /* Opcode 2, ISZ */ // same structure as AND: direct / indirect with zero / current page break; /* Opcode 3, DCA */ // same structure as AND: direct / indirect with zero / current page break; /* Opcode 4, JMS */ // same structure as AND: direct / indirect with zero / current page // but also modifications to emulate timeshare control break; /* Opcode 5, JMP */ // same structure as JMS: direct / indirect with zero / current page // including modifications to emulate timeshare control break; /* Opcode 7, OPRs */ // handle all Operate group 1, 2, 3 standard, and 3 EAE variations // group 3 EAE includes Mode A and Mode B emulation break; /* Opcode 6, IOT */ // handle all IOTs including timeshare control card /* ---PiDP add--------------------------------------------------------------------------------------------- */ // Update the front panel with this instruction's final state. /* ---PiDP end---------------------------------------------------------------------------------------------- */ } /* end while */